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 VRE3050 Low Cost Precision Reference
THALER CORPORATION * 2015 N. FORBES BOULEVARD * TUCSON, AZ. 85745 * (520) 882-4000
FEATURES
* 5.000 V Output 0.500 mV (.01%) * Temperature Drift: 0.6 ppm/C * Low Noise: 3V p-p (0.1Hz-10Hz) * Low Thermal Hysterisis: 1 ppm Typ. * 15mA Output Source and Sink Current * Excellent Line Regulation: 5 ppm/V Typ. * Optional Noise Reduction and Voltage Trim * Industry Standard Pinout
PIN CONFIGURATION
N/C +VIN N/C GND 1 2 3 4 8 NOISE REDUCTION N/C VOUT TRIM
VRE3050 TOP VIEW
7 6 5
FIGURE 1
DESCRIPTION
The VRE3050 is a low cost, high precision 5.0V reference that operates from +10V. The device features a buried zener for low noise and excellent long term stability. Packaged in an 8 pin DIP and SMT, the device is ideal for high resolution data conversion systems. The device provides ultrastable +5.000V output with 0.5000 mV (.01%) initial accuracy and a temperature coefficient of 0.6 ppm/C. This improvement in accuracy is made possible by a unique, patented multipoint laser compensation technique developed by Thaler Corporation. Significant improvements have been made in other performance parameters as well, including initial accuracy, warm-up drift, line regulation, and long-term stability, making the VRE3050 series the most accurate reference available. For enhanced performance, the VRE3050 has an external trim option for users who want less than 0.01% initial error. For ultra low noise applications, an external capacitor can be attached between the noise reduction pin and the ground pin. The VRE3050 is recommended for use as a reference for 14, 16, or 18 bit data converters which require an external precision reference. The device is also ideal for calibrating scale factor on high resolution data converters. The VRE3050 offers superior performance over monolithic references. SELECTION GUIDE Initial Error mV
0.5 0.8 1.0 0.5 0.8 1.0
Model
VRE3050A VRE3050B VRE3050C VRE3050J VRE3050K VRE3050L
Temp. Coeff. ppm/C
0.6 1.0 2.0 0.6 1.0 2.0
Temp. Range C
0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C
For package option add D for DIP or S for Surface Mount to end of model number.
VRE3050DS REV. D JULY 2000
ABSOLUTE MAXIMUM RATINGS
Power Supply ...........................-0.3V to +40V OUT, TRIM ..............................-0.3V to +12V NR..........................................-0.3V to +6V Operating Temp. (A,B,C)...............0C to 70C Operating Temp. (J,K,L)...............-40C to 85C Out Short Circuit to GND Duration (VIN< 12V)......Continuous Out Short Circuit to GND Duration (VIN< 40V).............5 sec Out Short Circuit to IN Duration (VIN< 12V).........Continuous Continuous Power Dissipation (TA = +70C)............300mW Storage Temperature................................-65C to 150C Lead Temperature (soldering,10 sec).......................250C
ELECTRICAL SPECIFICATIONS
Vps =+10V, T = 25C, Iout=0mA unless otherwise noted.
PARAMETER Input Voltage
SYMBOL VIN
CONDITIONS
MIN 8
TYP
MAX 36
UNITS V
VRE3050A/J Output Voltage (Note 1) Output Voltage Temperature Coefficient (Note 2) Trim Adjustment Range Turn-On Settling Time Output Noise Voltage Temperature Hysterisis Long Term Stability Supply Current Load Regulation (Note 3) VOUT/t IIN VOUT/ IOUT Sourcing: 0mA IOUT 15mA Sinking: -15mA IOUT 0mA 8V VIN 10V 10V VIN 18V VOUT VRE3050B/K VRE3050C/L VRE3050A/J TCVOUT VRE3050B/K VRE3050C/K VOUT Ton en Figure 3 To 0.01% of final value 0.1Hz4.9995 4.9992 4.9990
5.0000 5.0000 5.0000 0.3 0.5 1.0 5 2 3.0 2.5 1 6 3.5 8 8 25 5
5.0005 5.0008 5.0010 0.6 1.0 2.0 mV s Vp-p 5.0 VRMS ppm ppm/ 1khrs 4.0 12 12 35 ppm/V 10 mA ppm/ mA ppm/C V
Line Regulation (Note 3) Notes:
VOUT/ VIN
1) The specified values are without external trim. 2) The temperature coefficient is determined by the box method. See discussion on temperature performance. 3) Line and load regulation are measured with pulses and do not include voltage changes due to temperature. 4) Hysterisis over the operating temperature range.
VRE3050DS REV. D JULY 2000
TYPICAL PERFORMANCE CURVES
VOUT vs. TEMPERATURE
1.00 0.75 0.50 1.00 0.75 0.50
VOUT vs. TEMPERATURE
1.00 0.75 0.50
VOUT vs. TEMPERATURE
Upper
Limit
Vout (mV)
Vout (mV)
0.25 0 -0.25 -0.50 -0.75 -1.00
0 -0.25 -0.50 -0.75 -1.00 0 20 30 40 50 60 70 Lower Limit Lower Limit
Vout (mV)
0.25
Upper Limit Upper Limit
Upper
Limit
0.25 0 -0.25 -0.50 -0.75
Lower Limit
Lower
Limit
0
20
30
40
50
60
70
-1.00
0
20
30
40
50
60
70
Temperature (oC) VRE3050A
Temperature (oC) VRE3050B
Temperature (oC) VRE3050C
VOUT vs. TEMPERATURE
2.0 1.5 1.0
Upper Limit
VOUT vs. TEMPERATURE
2.0 1.5 1.0
Upper Limit
VOUT vs. TEMPERATURE
2.0 1.5
Upper Limit
1.0
Vout (mV)
Vout (mV)
0 -0.5 -1.0 -1.5 -2.0 -50 -25
Lower Limit
0 -0.5 -1.0 -1.5 -2.0 -50 -25
Lower Limit
Vout (mV)
0.5
0.5
0.5 0 -0.5 -1.0 -1.5 -2.0 -50 -25
Lower Limit
0
25
50
75 100
0
25
50
75 100
0
25
50
75 100
Temperature VRE3050J
(oC)
Temperature VRE3050K
(oC)
Temperature VRE3050L
(oC)
SUPPLY CURRENT VS. SUPPLY VOLTAGE
6.0
QUIESCENT CURRENT VS. TEMP
8.0
OUTPUT IMPEDIANCE VS. FREQUENCY
Quiescent Current (mA)
5.0 4.0
6.0 4.0 2.0 0
3.0 0
0
5 10 15 20 25 30 35 40
-50
0
50
100
Output Impediance ( )
Supply Current (mA)
Supply Voltage (V)
Temperature
(oC)
Frequency (Hz)
VRE3050DS REV. D JULY 2000
TYPICAL PERFORMANCE CURVES
40
JUNCTION TEMP. RISE VS. OUTPUT CURRENT Ripple Rejection (dB)
100 90 80 70 60 10
RIPPLE REJECTION Vs. FREQUENCY(CNR=0F)
A
TURN-ON AND TURN-OFF TRANSIENT RESPONSE
+10V 0V
Junction Temperature Rise Above Ambient (oC)
30 20
c Vc
10 0
=
V 10
B
0
2
4
6
8
10
100
1k
10k
Output Current (mA)
Frequency (Hz)
1 s/div A: Vin, 10V/div B: Vout, 1V/div
OUTPUT NOISE-VOLTAGE DENSITY vs. FREQUENCY Output Noise Density (nV/Hz)
100 80
CHANGE IN OUTPUT VOLTAGE VS. OUTPUT CURRENT
400 300 100 0 -100 -200 -300 -400 200
CHANGE IN OUTPUT VOLTAGE VS. INPUT VOLTAGE
60 50 40 30 20 10 0 -10 -20
60 40 20 10
100
1k
10k
02
4
6
8 10 12 14 16
Vout (ppm)
Vout (V)
0
9 10 11 12 13 14 15 16
Frequency (Hz)
Iout(mA)
Vin(V)
0.1Hz to 10Hz Noise
Vout, 1V/Div
1 Sec/Div
VRE3050DS REV. D JULY 2000
THEORY OF OPERATION The following discussion refers to the schematic in figure 2 below. A FET current source is used to bias a 6.3V zener diode. The zener voltage is divided by the resistor network R1 and R2. This voltage is then applied to the noninverting input of the operational amplifier which amplifies the voltage to produce a 5.000V output. The gain is determined by the resistor networks R3 and R4: G=1 + R4/R3. The 6.3V zener diode is used because it is the most stable diode over time and temperature.
8 2
BASIC CIRCUIT CONNECTION Figure 3 shows the proper connection of the VRE3050 voltage reference with the optional trim resistor for initial error and the optional capacitor for noise reduction.
+ VIN
2 8 CN 1F Optional Noise Reduction Capacitor VRE3050 5 4 Optional Fine Trim Adjustment 6
+ VOUT 10k
+
R1 R4 R2 R3
6
Figure 3 External Connections
5
4
To achieve the specified performance, pay careful attention to the layout. A low resistance star configuration will reduce voltage errors, noise pickup, and noise coupled from the power supply. Commons should be connected to a single point to minimize interconnect resistances.
Figure 2 Functional Block Diagram
The current source provides a closely regulated zener current, which determines the slope of the references' voltage vs. temperature function. By trimming the zener current a lower drift over temperature can be achieved. But since the voltage vs. temperature function is nonlinear this compensation technique is not well suited for wide temperature ranges. Thaler Corporation has developed a nonlinear compensation network of thermistors and resistors that is used in the VRE series voltage references. This proprietary network eliminates most of the nonlinearity in the voltage vs. temperature function. By adjusting the slope, Thaler Corporation produces a very stable voltage over wide temperature ranges. This network is less than 2% of the overall network resistance so it has a negligible effect on long term stability. Figure 3 shows the proper connection of the VRE3050 series voltage references with the optional trim resistor for initial error and the optional capacitor for noise reduction. PIN DESCRIPTION 1,3,7 2 4 5 6 8 N.C. Vin GND TRIM OUT NR Internally connected. Do not use Positive power supply input Ground External trim input. Leave open if not used. Voltage reference output Noise Reduction
VRE3050DS REV. D JULY 2000
TEMPERATURE PERFORMANCE The VRE3050 is designed for applications where the initial error at room temperature and drift over temperature are important to the user. For many instrument manufacturers, a voltage reference with a temperature coefficient less than 1ppm/C makes it possible to not perform a system temperature calibration, a slow and costly process. Of the three TC specification methods (slope, butterfly, and box), the box method is most commonly used. A box is formed by the min/max limits for the nominal output voltage over the operating temperature range. The equation follows:
THERMAL HYSTERISIS A change in output voltage as a result of a temperature change. When references experience a temperature change and return to the initial temperature, they do not always have the same initial voltage. Thermal hysterisis is difficult to correct and is a major error source in systems that experience temperature changes greater than 25C. Reference vendors are starting to include this important specification in their datasheets.
Vmax - Vmin * 10 6 T .C. = V * (Tmax - Tmin ) nominal
This method corresponds more accurately to the method of test and provides a closer estimate of actual error than the other methods. The box method guarantees limits for the temperature error but does not specify the exact shape and slope of the device under test. A designer who needs a 14-bit accurate data acquisition system over the industrial temperature range (-40C to +85C), will need a voltage reference with a temperature coefficient (TC) of 1.0ppm/C if the reference is allowed to contribute an error equivalent to 1LSB. For 1/2LSB equivalent error from the reference you would need a voltage reference with a temperature coefficient of 0.5ppm/C. Figure 4 shows the required reference TC vs. delta T change from 25C for resolution ranging from 8 bits to 20 bits.
10000
1000
100 8 BIT
ReferenceTC (ppm/C)
10
10 BIT 12 BIT
1 14 BIT 16 BIT 0.1 18 BIT 0.01 1 10 20 BIT 100
Reference TC vs. T change from 25C for 1 LSB change
VRE3050DS REV. D JULY 2000
MECHANICAL SPECIFICATIONS
INCHES DIM A B B1 C C1 C2 D MIN .110 .095 .021 .055 .012 .020 .395 MAX .120 .105 .027 .065 .020 .040 .405
MILLIMETER MIN MAX DIM D1 E E1 E2 P S
INCHES MIN .372 .425 .397 .264 .085 .045 MAX .380 .435 .403 .270 .095 .055
MILLIMETER MIN 9.45 MAX 9.65
2.794 3.048 2.413 2.667 0.533 0.686 1.397 1.651 0.305 0.508 0.508 1.016 10.03 10.29
10.80 11.05 10.08 10.24 6.71 2.16 1.14 6.86 2.41 1.40
D D1
E2 E1
E
1
A P C1 B B1 C C2 S
VRE3050DS REV. D JULY 2000
MECHANICAL SPECIFICATIONS
INCHES DIM A B B1 C C1 D D1 MIN .170 .095 .016 .008 .055 .395 .372 MAX .180 .105 .020 .011 .065 .405 .380
MILLIMETER MIN MAX DIM E E1 E2 G L P S
INCHES MIN .425 .397 .264 .290 .175 .085 .045 MAX .435 .403 .270 .310 .225 .095 .055
MILLIMETER MIN MAX
4.318 4.572 2.413 2.667 0.406 0.508 0.203 0.279 1.397 1.651 10.03 10.29 9.45 9.65
10.80 11.05 10.08 10.24 6.71 7.36 4.46 2.16 1.14 6.86 7.87 5.72 2.41 1.40
D D1
E2 E1
E
1
A C1 L B B1 S C G
P
VRE3050DS REV. D JULY 2000


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